INTRODUCTION
- In the same way that gates are the building blocks of combinational circuits, latches and flip-flops are the building blocks of sequential circuits.
- While gates had to be built directly from transistors, latches can be built from gates, and flip-flops can be built from latches.
- Both latches and flip-flops are circuit elements whose output depends not only on the current inputs, but also on previous inputs and outputs. The difference between a latch and a flip-flop is that a latch does not have a clock signal, whereas a flip-flop always does.
- Latches are asynchronous, which means that the output changes very soon after the input changes. Most computers today, on the other hand, are synchronous, which means that the outputs of all the sequential circuits change simultaneously to the rhythm of a global clock signal.
- A flip-flop is a synchronous version of the latch.
DESCRIPTION OF THE CLOCKED SR FLIP FLOP (USING NOR GATES)
A simple clocked SR flipflop built from AND-gates in front of a basic SR flipflop with NOR-gates.
Obviously, the values at the R and S inputs are gated with the clock signal C. Therefore, as long as the C signal stays at 0 value, the flipflop stores its value.
On the other hand, the flipflop behaves like the standard SR flipflop while C is 1.
Because the behavior is controlled by the static level of the clock signal, such flipflops are called level-sensitive or latches.
To ensure that flip-flops change in synchronism with other parts of the circuit, they are not allowed to change state until they receive a CLOCK PULSE.
SET and RESET cannot affect the outputs unless the clock pulse is high.
In the TIMING DIAGRAM below,
- at A, SET is HIGH but the CLOCK is LOW, so there is no change in the outputs.
- At B, SET is still HIGH, and CLOCK is HIGH. Therefore Q goes HIGH.
- At C, the CLOCK is HIGH and RESET has gone HIGH. Therefore Q goes LOW.
- At D, the CLOCK is HIGH but SET is LOW. There is no change in output levels.
- At E, CLOCK and SET are both HIGH. Q goes HIGH.
